1. Field of the Invention
The present invention relates to a semiconductor device which can restrain a microloading effect liable to be produced when a portion of the device to be patterned at a high aspect ratio is etched, and a method of fabricating the same.
2. Description of the Related Art
For example, when a semiconductor substrate is patterned, etching is sometimes carried out simultaneously both for a part where a pattern is dense (hereinafter referred to as “dense pattern part”) and for another part where a pattern is sparse (hereinafter referred to as “sparse pattern part”). In this case, since it is hard for a radical in the etching to reach a deep part of dense pattern part of a film to be etched, an etching speed in the dense pattern part becomes lower than an etching speed in the sparse pattern part. As a result, the microloading effect results in level differences among patterns etched under the same conditions.
FIGS. 13A to 14C schematically illustrate sections at individual processes in a method of fabricating a non-volatile memory such as flash memory. FIGS. 13A and 14A are longitudinally sectional views of the major parts. FIGS. 13B and 14B are longitudinally sectional side views showing the dense patterned portion. FIGS. 13C and 14C are longitudinally sectional side views showing the sparse pattern part. In these figures, reference numeral 1 designates a semiconductor substrate, 2 a gate oxide film, 3 and 6 polycrystalline silicon layers respectively, 4 a shallow trench isolation (STI), 5 an oxide-nitride-oxide (ONO) film, 7 a tungsten-silicide (WSi) film or tungsten (W) film, 8 a silicon nitride, and 9 a resist. When each of the layers 6 to 8 is etched nearly to the ONO film 5 with the resist 9 serving as a mask, the polycrystalline silicon layer 6 of the dense pattern part formed on an upper layer of the ONO film 5 is underetched due to the microloading effect, thereby constituting residue (see an underetched remainder 6a shown in FIG. 13B).
The polycrystalline silicon layer 3 formed on the gate oxide film 2 is further formed with a skirt 3a by the microloading effect when the ONO film 5 and the polycrystalline silicon layer 3 are further etched with the resist 9 patterned on the semiconductor substrate 1 or the like serving as the mask until the gate oxide film 2 is exposed. As a result, electrons charged in a floating gate formed by the polycrystalline silicon layer 3 flows through the skirt 3b between memory cells. In the worst case, there is a possibility that the semiconductor device cannot maintain a normal operation such that failure may occur. To overcome the aforementioned drawback, JP-A-2001-189300 discloses a method of fabricating a semiconductor device, for example. In the disclosed method, the dense pattern part is re-etched with only the sparse pattern part being masked, whereby residue due to the microloading effect is eliminated.
In a semiconductor device to be patterned until the aspect ratio of about 5, pattern formation can be carried out while an adverse effect of the microloading effect is restrained as the result of recent improvement in the semiconductor processing. However, in more recent years, the pattern design has been carried out according to a design rule that a semiconductor device is patterned at a further higher aspect ratio (7 or above, for example). Thus, the semiconductor processing needs to be improved itself. Moreover, the dense pattern part and the sparse pattern part need to be formed individually when the aforesaid process is used. Further, in order that the first polycrystalline silicon layer 3 may serve as a floating gate of a flash memory, a recess 3a is sometimes formed in the first polycrystalline silicon layer 3. The ONO film 5 is formed so as to fill and cover the recess 3a. The polycrystalline silicon layer 6 is formed on the ONO film 5. Further, the WSi film or W film 7, the silicon nitride or silicon oxide 8 and the resist 9 are formed and subsequently, an etching process is carried out nearly to the ONO film 5 so that the dense pattern is not underetched. In this case, when the adverse effect of the microloading is considered, the polycrystalline silicon layer 6 is over-etched as far as the inside of the recess 3a formed by the ONO film 5 and the polycrystalline silicon layer 3.